[徵才] 輝達 nVIDIA 徵 Mix Signal Verification

看板Tech_Job (科技人)作者 (老吾)時間3月前 (2024/07/23 05:56), 編輯推噓10(1006)
留言16則, 12人參與, 3月前最新討論串1/1
各位科技版大大們好,NV 台灣team 組內需要找一位工程師, 主要是做 Mixed Signal Circuit Verification職務, 內容主要為 UPHY/memory RTL model 和 circuit function equivalence verification 請有興趣的朋友可以寄信給我唷! 以下為徵才資訊 Mixed Signal Design Verification Engineer We are looking for an Engineer to verify the design and implementation of the world’s leading SoC's and GPU's. This position offers the opportunity to have real impact in a dynamic, technology-focused company impacting product lines ranging from consumer graphics to self-driving cars and the growing field of artificial intelligence. We have crafted a team of extraordinary people stretching around the globe, whose mission is to push the frontiers of what is possible today and define the high-speed Serdes platform for the future of computing. What you'll be doing: ‧ As a key member of our circuit verification team, you will verify the design and implementation of the industry's leading GPU ‧ Responsible for verification of the Mixed Signal CMOS circuit design, RTL models versus circuit equivalence using advanced verification methodologies ‧ You are expected to understand mixed-signal CMOS circuits design and implementation, define the verification scope, develop the verification infrastructure and verify the correctness of the design. ‧ Work closely with Multi-functional teams, circuit and logic design, model engineering to accomplish tasks. What we need to see: ‧ Bachelors Degree in EE, CS or CE or equivalent experience ‧ 3+ years of relevant experience or an Advanced Degree with equivalent experience ‧ Experience in deep sub-micron process design experience in CMOS Analog / Mixed Signal Circuit Design ‧ Background with design and verification tools (Cadence's IC design environment, analog circuit simulation tools like HSpice, Finesim, XA) ‧ Experience in crafting test bench environments for component and top level circuit verification ‧ Expertise in System Verilog or similar HVL and strong debugging and analytical skills ‧ Perl and C/C++ programming language experience desirable ‧ Strong communication skills and ability & desire to work as a great teammate are huge plus. NVIDIA is committed to fostering a diverse work environment and proud to be an equal opportunity employer. As we highly value diversity in our current and future employees, we do not discriminate (including in our hiring and promotion practices) on the basis of race, religion, color, national origin, gender, gender expression, sexual orientation, age, marital status, veteran status, disability status or any other characteristic protected by law. -----End 薪資範圍: 依年資 200萬 ~ 500萬 (Base 不含股票) 意者請自備英文履歷寄到: jaswu@nvidia.com 感謝!! -- ※ 發信站: 批踢踢實業坊(ptt.cc), 來自: 216.228.112.22 (美國) ※ 文章網址: https://www.ptt.cc/bbs/Tech_Job/M.1721685409.A.284.html

07/23 06:42, 3月前 , 1F
Nv 台灣hw大概九成都mixed signal
07/23 06:42, 1F

07/23 10:10, 3月前 , 2F
要求幾年資歷?
07/23 10:10, 2F

07/23 10:35, 3月前 , 3F
內文寫3+
07/23 10:35, 3F

07/23 13:11, 3月前 , 4F
可能又是代理 條件堆出來卻不是美國直招
07/23 13:11, 4F

07/23 13:12, 3月前 , 5F
這種就是測試仔Verify
07/23 13:12, 5F

07/23 13:14, 3月前 , 6F
verify 500萬base加上股票600-800萬,在台灣不夠爽
07/23 13:14, 6F

07/23 13:14, 3月前 , 7F
07/23 13:14, 7F

07/23 13:30, 3月前 , 8F
九成? 純digital的DE+DV都不只一成了吧
07/23 13:30, 8F

07/23 14:24, 3月前 , 9F
serdes這種靠在analog旁邊的我也當mixed
07/23 14:24, 9F

07/23 15:40, 3月前 , 10F
沒資格當員工只能當股東 各位加油
07/23 15:40, 10F

07/23 16:45, 3月前 , 11F
CP/FT testing engineer!!
07/23 16:45, 11F

07/23 18:40, 3月前 , 12F
是有人離職嗎?
07/23 18:40, 12F

07/23 21:50, 3月前 , 13F
看起來是幫designer做驗證的缺
07/23 21:50, 13F

07/23 22:51, 3月前 , 14F
下限很低,連QA品管也能算verify
07/23 22:51, 14F

07/24 05:32, 3月前 , 15F
是計畫太多,需要人力驗證,還蠻操的
07/24 05:32, 15F

07/24 10:24, 3月前 , 16F
看來又要有人落跑過去
07/24 10:24, 16F
文章代碼(AID): #1cdjMXA4 (Tech_Job)
文章代碼(AID): #1cdjMXA4 (Tech_Job)