[北美] verification engineer @ Xilinx

看板Oversea_Job (海外工作)作者 (作業作業作業.....)時間15年前 (2011/03/29 15:50), 編輯推噓0(000)
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這是幫朋友 po 的 請直接聯絡他,謝謝 ************************************ 請寄 resume 到 jes@xilinx.com Verification Engineer Detailed Description Xilinx SerDes technology group is looking for a verification engineer. The individual will help design and develop simulation and verification environments to prove the correctness of SerDes designs. Job Requirements -M.S. or Ph.D. in EE, CS or CE -Good knowledge in RTL and VLSI circuit designs -Familiarity with OOP coding experience (System Verilog, Vera, or C++) -Strong background in software -Experience with OVM, VMM, or RVM is plus -Experience with mixed-signal verification tool and methodology (CoSim/Nanosim) is a plus -Good communication skills -Strong understanding of all phase of ASIC and/or full custom chip development is encouraged -- ※ 發信站: 批踢踢實業坊(ptt.cc) ◆ From: 71.198.0.48
文章代碼(AID): #1DaOysZ_ (Oversea_Job)
文章代碼(AID): #1DaOysZ_ (Oversea_Job)